MT2511

Overview

MediaTek MT2511 is a 2-in-1 PPG (Photoplethysmography) and EKG (Electrocardiography) bio-sensing AFE (analog front-end) chip designed for health and fitness devices. The MT2511 enables bio signal acquisition through EKG and PPG simultaneously with high sensitivity and sampling rate.

Key features

  • 2-in-1 PPG and EKG bio-sensing AFE (Voltage/Current) design

  • 3.1 mm x 3.4 mm WLCSP package

  • Built-in beat interval detection circuit with SRAM to optimize power consumption for sleep heart rate monitoring

  • Integrates an oscillator to offer high-precision clock with an external crystal

  • Flexible timing control for dynamic power down for power saving

  • Two-electrode (2E) mode and right leg drive (RLD) mode for EKG monitoring

  • Ultra-low power consumption

The EKG channel supports two-electrode (2E) mode and right leg drive (RLD) mode, and acts as a buffer between human and circuit. It integrates a programmable gain amplifier (PGA), a right leg drive amplifier, and a 24-bit sigma-delta analog-to-digital converter (ADC) to sense and digitize the EKG signal.


The PPG channel is separated into two parts: Receiver (RX) and Transmitter (TX). The TX part consists of LED driver. The LED driver and the voltage boost are used to light up external LED and to provide the voltage drop of LED. The light emitted by LED is penetrated/reflected by the skin, and received by photodiode and the RX. The RX consists of a trans-impedance amplifier (TIA), a programmable gain amplifier (PGA), an ambient digital-to-analog converter (DAC), and a 24-bit incremental ADC. It amplifies and digitizes the received current.


MT2511 contains built-in heartbeat interval estimation for PPG signals and SRAM to optimize power consumption for sleep heart rate monitoring. This feature allows the external MCU to stay in idle mode up to four minutes when motion artifact cancellation is not required.

Block Diagram of MT2511

Data buffer memory

  • 1KB SRAM for EKG channel

  • 2KB SRAM for 2 PPG channels

  • 1KB SRAM for heartbeat internal detection channel


Package

  • WLCSP: 3.1 mm x 3.4 mm, 41 balls, 0.4 mm pitch


Connectivity

  • I2C maximum clock: 300KHz

  • SPI maximum clock: 2MHz


Actual operating clock frequency may depend on board level condition.


Heartbeat interval estimation

  • Built-in heartbeat interval estimation for PPG signals

  • SRAM for sleep heart rate monitoring


EKG channel

  • Programmable gain from 1 to 12

  • Low input-referred noise: 0.83uVrms at G=6 and BW=150Hz

  • Dynamic range: 110 dB at G=6

  • CMRR>85dB at 60Hz

  • Data rate: 64SPS to 4096SPS

  • Supports two-electrode and right leg drive mode

  • Input impedance: 125M~500MΩ at two-electrode mode and >1GΩ at right leg drive mode


PPG channel

  • Input maximum current range: 0.5-50μA

  • Input maximum capacitance: 1nF

  • Input-referred noise: 52pArms at 5μA input current

  • CMRR>80dB at 60Hz

  • PGA gain: 1~6 V/V

  • Ambient DAC1/2 range: 1~6μA

  • TX LED current range: 9.5/22.9/36.3/49.7/63.1/76.5/79.9/103.3mA, each with 8-bit current resolution

  • TX supports H-bridge and push/ pull mode

  • Loop back dynamic range: 100dB at 5μA input current

  • Flexible timing control and supports dynamic power down