MT2523 API Reference  LinkIt SDK v4
hal_platform.h
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34 
35 #ifndef __HAL_PLATFORM_H__
36 #define __HAL_PLATFORM_H__
37 
38 
39 #include "hal_define.h"
40 #include "hal_feature_config.h"
41 #include "mt2523.h"
42 #include "hal_weak.h"
43 #include "memory_map.h"
44 
45 #ifdef __cplusplus
46 extern "C" {
47 #endif
48 
49 
50 /*****************************************************************************
51 * Defines for module subfeatures.
52 * All the subfeatures described below are mandatory for the driver operation. No change is recommended.
53 *****************************************************************************/
54 #ifdef HAL_CACHE_MODULE_ENABLED
55 #define HAL_CACHE_WITH_REMAP_FEATURE /* Enable CACHE settings with remap feature. */
56 #endif
57 
58 #ifdef HAL_ADC_MODULE_ENABLED
59 #define HAL_ADC_FEATURE_SET_INPUT_AND_DISABLE_PULL /* Set the pin as input and disable the pull when the pin is in ADC mode. */
60 #endif
61 
62 #ifdef HAL_I2C_MASTER_MODULE_ENABLED
63 #define HAL_I2C_MASTER_FEATURE_SEND_TO_RECEIVE /* Enable I2C master send to receive feature. */
64 #define HAL_I2C_MASTER_FEATURE_EXTENDED_DMA /* Enable I2C master extend DMA feature. */
65 
66 #endif
67 
68 #ifdef HAL_SPI_MASTER_MODULE_ENABLED
69 #define HAL_SPI_MASTER_FEATURE_ADVANCED_CONFIG /* Enable SPI master advanced configuration feature. For more details, please refer to hal_spi_master.h. */
70 #define HAL_SPI_MASTER_FEATURE_DEASSERT_CONFIG /* Enable SPI master deassert configuration feature to deassert the chip select signal after data transfer is complete. For more details, please refer to hal_spi_master.h. */
71 #define HAL_SPI_MASTER_FEATURE_MACRO_CONFIG /* Enable SPI master pad_macro configuration feature to set pad_macro for related SPI pins. For more details, please refer to hal_spi_master.h. */
72 #define HAL_SPI_MASTER_FEATURE_CHIP_SELECT_TIMING /* Enable SPI master chip select timing configuration feature to set timing value for chip select signal. For more details, please refer to hal_spi_master.h. */
73 #define HAL_SPI_MASTER_FEATURE_DMA_MODE /* Enable SPI master DMA mode feature to do data transfer. For more details, please refer to hal_spi_master.h. */
74 #endif
75 
76 #ifdef HAL_GPIO_MODULE_ENABLED
77 #define HAL_GPIO_FEATURE_INVERSE /* Input status of the pin can be set to the reverse state. For more details, please refer to hal_gpio.h. */
78 #define HAL_GPIO_FEATURE_PUPD /* Pull state of the pin can be configured with different resistors through different combinations of GPIO_PUPD_x,GPIO_RESEN0_x and GPIO_RESEN1_x. For more details, please refer to hal_gpio.h. */
79 #define HAL_GPIO_FEATURE_CLOCKOUT /* The pin can be configured as an output clock. For more details, please refer to hal_gpio.h. */
80 #define HAL_GPIO_FEATURE_HIGH_Z /* The pin can be configured to provide high impedance state to prevent possible electric leakage. For more details, please refer to hal_gpio.h. */
81 #define HAL_GPIO_FEATURE_SET_DRIVING /* The pin can be configured to enhance driving. For more details, please refer to hal_gpio.h. */
82 #endif
83 
84 #ifdef HAL_EINT_MODULE_ENABLED
85 #define HAL_EINT_FEATURE_MASK /* Supports EINT mask interrupt. */
86 #define HAL_EINT_FEATURE_SW_TRIGGER_EINT /* Supports software triggered EINT interrupt. */
87 #endif
88 
89 #ifdef HAL_GPT_MODULE_ENABLED
90 #define HAL_GPT_FEATURE_US_TIMER /* Supports a microsecond timer. */
91 #define HAL_GPT_SW_GPT_FEATURE /* Supports software GPT timer. */
92 #define HAL_GPT_PORT_ALLOCATE /* Allocates GPT communication port. */
93 #endif
94 
95 #ifdef HAL_KEYPAD_MODULE_ENABLED
96 #ifdef HAL_PMU_MODULE_ENABLED
97 #ifndef MTK_EXTERNAL_PMIC
98 #define HAL_KEYPAD_FEATURE_POWERKEY /* The powerkey can be used as a normal key.*/
99 #endif
100 #endif
101 #endif
102 
103 #ifdef HAL_PWM_MODULE_ENABLED
104 #define HAL_PWM_FEATURE_ADVANCED_CONFIG /* Supports PWM advanced configuration. */
105 #endif
106 
107 #ifdef HAL_RTC_MODULE_ENABLED
108 #define HAL_RTC_FEATURE_TIME_CALLBACK /* Supports time change notification callback. */
109 #endif
110 
111 #ifdef HAL_SPI_SLAVE_MODULE_ENABLED
112 #define HAL_SPI_SLAVE_FEATURE_SW_CONTROL /* Supports SPI slave to communicate with SPI master using software control. */
113 #endif
114 
115 #ifdef HAL_SLEEP_MANAGER_ENABLED
116 #define HAL_SLEEP_MANAGER_SUPPORT_WAKEUP_SOURCE_CONFIG /* Supports wakeup source interrupt configuration. */
117 #define HAL_SLEEP_MANAGER_SUPPORT_POWER_OFF /* Supports power off mode. */
118 
126 /*****************************************************************************
127  * Enum
128  *****************************************************************************/
130 typedef enum {
138 typedef enum {
157 #endif
158 
159 #ifdef HAL_UART_MODULE_ENABLED
160 
168 /*****************************************************************************
169 * UART
170 *****************************************************************************/
180 typedef enum {
187 
196 #endif
197 
198 
199 #ifdef HAL_I2C_MASTER_MODULE_ENABLED
200 #ifdef HAL_I2C_MASTER_FEATURE_EXTENDED_DMA
201 
262 #endif
263 
270 #define HAL_I2C_MAXIMUM_POLLING_TRANSACTION_SIZE 8
271 
274 #define HAL_I2C_MAXIMUM_DMA_TRANSACTION_SIZE 15
275 
284 /*****************************************************************************
285 * I2C master
286 *****************************************************************************/
302 typedef enum {
308 
317 #endif
318 
319 
320 #ifdef HAL_GPIO_MODULE_ENABLED
321 
331 /*****************************************************************************
332 * GPIO
333 *****************************************************************************/
339 typedef enum {
350  HAL_GPIO_10 = 10,
351  HAL_GPIO_11 = 11,
352  HAL_GPIO_12 = 12,
353  HAL_GPIO_13 = 13,
354  HAL_GPIO_14 = 14,
355  HAL_GPIO_15 = 15,
356  HAL_GPIO_16 = 16,
357  HAL_GPIO_17 = 17,
358  HAL_GPIO_18 = 18,
359  HAL_GPIO_19 = 19,
360  HAL_GPIO_20 = 20,
361  HAL_GPIO_21 = 21,
362  HAL_GPIO_22 = 22,
363  HAL_GPIO_23 = 23,
364  HAL_GPIO_24 = 24,
365  HAL_GPIO_25 = 25,
366  HAL_GPIO_26 = 26,
367  HAL_GPIO_27 = 27,
368  HAL_GPIO_28 = 28,
369  HAL_GPIO_29 = 29,
370  HAL_GPIO_30 = 30,
371  HAL_GPIO_31 = 31,
372  HAL_GPIO_32 = 32,
373  HAL_GPIO_33 = 33,
374  HAL_GPIO_34 = 34,
375  HAL_GPIO_35 = 35,
376  HAL_GPIO_36 = 36,
377  HAL_GPIO_37 = 37,
378  HAL_GPIO_38 = 38,
379  HAL_GPIO_39 = 39,
380  HAL_GPIO_40 = 40,
381  HAL_GPIO_41 = 41,
382  HAL_GPIO_42 = 42,
383  HAL_GPIO_43 = 43,
384  HAL_GPIO_44 = 44,
385  HAL_GPIO_45 = 45,
386  HAL_GPIO_46 = 46,
387  HAL_GPIO_47 = 47,
388  HAL_GPIO_48 = 48,
391 
400 #endif
401 
402 #ifdef HAL_GPIO_FEATURE_CLOCKOUT
403 
411 /*****************************************************************************
412 * CLKOUT
413 *****************************************************************************/
415 typedef enum {
424 
425 
427 typedef enum {
440 #endif
441 
442 #ifdef HAL_ADC_MODULE_ENABLED
443 
453 /*****************************************************************************
454 * ADC
455 *****************************************************************************/
457 typedef enum {
467 
477 #endif
478 
479 
480 
481 #ifdef HAL_I2S_MODULE_ENABLED
482 
492 /*****************************************************************************
493 * I2S
494 *****************************************************************************/
498 typedef enum {
504 
505 
507 typedef enum {
515 
516 
518 typedef enum {
529 
538 #endif
539 
540 
541 #ifdef HAL_SPI_MASTER_MODULE_ENABLED
542 
553 #define HAL_SPI_MAXIMUM_POLLING_TRANSACTION_SIZE 32
554 
557 #define HAL_SPI_MASTER_CLOCK_MIN_FREQUENCY 30000
558 
561 #define HAL_SPI_MASTER_CLOCK_MAX_FREQUENCY 13000000
562 
572 /*****************************************************************************
573 * SPI master
574 *****************************************************************************/
580 typedef enum {
587 
588 
590 typedef enum {
595 
597 typedef enum {
601 
602 
604 typedef enum {
608 
609 
611 typedef enum {
615 
624 #endif
625 
626 #ifdef HAL_SPI_SLAVE_MODULE_ENABLED
627 
636 /*****************************************************************************
637 * SPI slave
638 *****************************************************************************/
642 typedef enum {
646 
648 typedef enum {
652 
654 typedef enum {
658 
659 
661 typedef enum {
665 
667 typedef enum {
668  HAL_SPI_SLAVE_EVENT_POWER_ON = SPISLV_IRQ_POWERON_IRQ_MASK,
669  HAL_SPI_SLAVE_EVENT_POWER_OFF = SPISLV_IRQ_POWEROFF_IRQ_MASK,
670  HAL_SPI_SLAVE_EVENT_CRD_FINISH = SPISLV_IRQ_CRD_FINISH_IRQ_MASK,
671  HAL_SPI_SLAVE_EVENT_RD_FINISH = SPISLV_IRQ_RD_FINISH_IRQ_MASK,
672  HAL_SPI_SLAVE_EVENT_CWR_FINISH = SPISLV_IRQ_CWR_FINISH_IRQ_MASK,
673  HAL_SPI_SLAVE_EVENT_WR_FINISH = SPISLV_IRQ_WR_FINISH_IRQ_MASK,
674  HAL_SPI_SLAVE_EVENT_RD_ERR = SPISLV_IRQ_RD_ERR_IRQ_MASK,
675  HAL_SPI_SLAVE_EVENT_WR_ERR = SPISLV_IRQ_WR_ERR_IRQ_MASK,
676  HAL_SPI_SLAVE_EVENT_TIMEOUT_ERR = SPISLV_IRQ_TIMEOUT_ERR_IRQ_MASK
678 
680 typedef enum {
690 
700 #endif
701 
702 
703 #ifdef HAL_RTC_MODULE_ENABLED
704 
713 /*****************************************************************************
714 * rtc
715 *****************************************************************************/
719 #define HAL_RTC_BACKUP_BYTE_NUM_MAX (13)
720 
729 #endif
730 
731 
732 #ifdef HAL_EINT_MODULE_ENABLED
733 
742 /*****************************************************************************
743 * EINT
744 *****************************************************************************/
746 typedef enum {
747  HAL_EINT_NUMBER_0 = 0,
748  HAL_EINT_NUMBER_1 = 1,
749  HAL_EINT_NUMBER_2 = 2,
750  HAL_EINT_NUMBER_3 = 3,
751  HAL_EINT_NUMBER_4 = 4,
752  HAL_EINT_NUMBER_5 = 5,
753  HAL_EINT_NUMBER_6 = 6,
754  HAL_EINT_NUMBER_7 = 7,
755  HAL_EINT_NUMBER_8 = 8,
756  HAL_EINT_NUMBER_9 = 9,
757  HAL_EINT_NUMBER_10 = 10,
758  HAL_EINT_NUMBER_11 = 11,
759  HAL_EINT_NUMBER_12 = 12,
760  HAL_EINT_NUMBER_13 = 13,
761  HAL_EINT_NUMBER_14 = 14,
762  HAL_EINT_NUMBER_15 = 15,
763  HAL_EINT_NUMBER_16 = 16,
764  HAL_EINT_NUMBER_17 = 17,
765  HAL_EINT_NUMBER_18 = 18,
766  HAL_EINT_NUMBER_19 = 19,
781 
789 #endif
790 
791 #ifdef HAL_GPT_MODULE_ENABLED
792 
801 /*****************************************************************************
802 * GPT
803 *****************************************************************************/
805 typedef enum {
806  HAL_GPT_0 = 0,
807  HAL_GPT_1 = 1,
808  HAL_GPT_2 = 2,
809  HAL_GPT_3 = 3,
810  HAL_GPT_4 = 4,
811  HAL_GPT_5 = 5,
814 
816 typedef enum {
820 
823 #define HAL_GPT_MAXIMUM_MS_TIMER_TIME (130150523)
824 
832 #endif
833 
834 #ifdef HAL_FLASH_MODULE_ENABLED
835 
842 /*****************************************************************************
843 * Flash
844 *****************************************************************************/
845 /* NULL */
846 
851 #endif
852 
853 #ifdef HAL_GDMA_MODULE_ENABLED
854 
862 /*****************************************************************************
863 * GDMA
864 *****************************************************************************/
866 typedef enum {
870 
880 #endif
881 
882 #ifdef HAL_PWM_MODULE_ENABLED
883 
891 /*****************************************************************************
892 * PWM
893 *****************************************************************************/
895 typedef enum {
896  HAL_PWM_0 = 0,
897  HAL_PWM_1 = 1,
898  HAL_PWM_2 = 2,
899  HAL_PWM_3 = 3,
900  HAL_PWM_4 = 4,
901  HAL_PWM_5 = 5,
904 
905 
907 typedef enum {
911 
919 #endif
920 
921 #ifdef HAL_WDT_MODULE_ENABLED
922 
931 /*****************************************************************************
932 * WDT
933 *****************************************************************************/
936 #define WDT_RESTART_ADDRESS (0xA2050008)
937 #define WDT_RESTART_KEY (0x1971)
938 
947 #endif
948 
949 #ifdef HAL_CACHE_MODULE_ENABLED
950 
957 /*****************************************************************************
958 * Cache
959 *****************************************************************************/
960 /* NULL */
961 
966 #endif
967 
968 #ifdef HAL_GPC_MODULE_ENABLED
969 
978 typedef enum {
979  HAL_GPC_0 = 0,
980  HAL_GPC_MAX_PORT
981 } hal_gpc_port_t;
982 
983 
991 #endif
992 
993 
994 #ifdef HAL_SD_MODULE_ENABLED
995 
1003 /*****************************************************************************
1004 * SD
1005 *****************************************************************************/
1007 typedef enum {
1010 } hal_sd_port_t;
1011 
1019 #endif
1020 
1021 
1022 #ifdef HAL_SDIO_MODULE_ENABLED
1023 
1031 /*****************************************************************************
1032 * SDIO
1033 *****************************************************************************/
1035 typedef enum {
1038 } hal_sdio_port_t;
1039 
1047 #endif
1048 
1049 #ifdef HAL_CLOCK_MODULE_ENABLED
1050 #include "hal_pmu_internal.h"
1051 
1052 /*****************************************************************************
1053 * Clock
1054 *****************************************************************************/
1055 
1117 /*************************************************************************
1118  * Define clock gating registers and bit structure.
1119  * Note: Mandatory, modify clk_cg_mask in hal_clock.c source file, if hal_clock_cg_id has changed.
1120  *************************************************************************/
1121 typedef enum {
1122  /* NR_PDN_COND0 = 7 */
1123  HAL_CLOCK_CG_BT_26M = 9, /* bit 9, PDN_COND0_FROM */
1124  HAL_CLOCK_CG_CAMINF48M = 10, /* bit 10, */
1125  HAL_CLOCK_CG_BT_BUSCK = 13, /* bit 13, */
1126  HAL_CLOCK_CG_BT_N9 = 15, /* bit 15, */
1127  HAL_CLOCK_CG_BUS = 20, /* bit 20, */
1128  HAL_CLOCK_CG_CM = 21, /* bit 21, */
1129  HAL_CLOCK_CG_BSI = 23, /* bit 23, PDN_COND0_TO */
1130 
1131  /* NR_PDN_COND1 = 17 */
1132  HAL_CLOCK_CG_SEJ = 0 + 32, /* bit 0, PDN_COND1_FROM */
1133  HAL_CLOCK_CG_DMA = 1 + 32, /* bit 1, */
1134  HAL_CLOCK_CG_USB48M = 2 + 32, /* bit 2, */
1135  HAL_CLOCK_CG_MSDC0 = 3 + 32, /* bit 3, */
1136  HAL_CLOCK_CG_I2C_D2D = 6 + 32, /* bit 6, */
1137  HAL_CLOCK_CG_I2C2 = 7 + 32, /* bit 7, */
1138  HAL_CLOCK_CG_CM4_OSTIMER = 10 + 32, /* bit 10, */
1139  HAL_CLOCK_CG_DMA_AO = 12 + 32, /* bit 12, */
1140  HAL_CLOCK_CG_UART0 = 13 + 32, /* bit 13, */
1141  HAL_CLOCK_CG_UART1 = 14 + 32, /* bit 14, */
1142  HAL_CLOCK_CG_UART2 = 15 + 32, /* bit 15, */
1143  HAL_CLOCK_CG_UART3 = 16 + 32, /* bit 16, */
1144  HAL_CLOCK_CG_SPISLV = 19 + 32, /* bit 19, */
1145  HAL_CLOCK_CG_SPI0 = 20 + 32, /* bit 20, */
1146  HAL_CLOCK_CG_SPI1 = 21 + 32, /* bit 21, */
1147  HAL_CLOCK_CG_SPI2 = 22 + 32, /* bit 22, */
1148  HAL_CLOCK_CG_SPI3 = 23 + 32, /* bit 23, PDN_COND1_TO */
1149 
1150  /* NR_PDN_COND2 = 18 */
1151  HAL_CLOCK_CG_PWM0 = 0 + 64, /* bit 0, PDN_COND2_FROM */
1152  HAL_CLOCK_CG_BTIF = 1 + 64, /* bit 1, */
1153  HAL_CLOCK_CG_GPTIMER = 2 + 64, /* bit 2, */
1154  HAL_CLOCK_CG_GPCOUNTER = 3 + 64, /* bit 3, */
1155  HAL_CLOCK_CG_PWM1 = 4 + 64, /* bit 4, */
1156  HAL_CLOCK_CG_EFUSE = 6 + 64, /* bit 6, */
1157  HAL_CLOCK_CG_LPM = 7 + 64, /* bit 7, */
1158  HAL_CLOCK_CG_CM_SYSROM = 8 + 64, /* bit 8, */
1159  HAL_CLOCK_CG_SFC = 9 + 64, /* bit 9, */
1160  HAL_CLOCK_CG_MSDC1 = 10 + 64, /* bit 10, */
1161  HAL_CLOCK_CG_USB_DMA = 12 + 64, /* bit 12, */
1162  HAL_CLOCK_CG_USB_BUS = 13 + 64, /* bit 13, */
1163  HAL_CLOCK_CG_DISP_PWM = 14 + 64, /* bit 14, */
1164  HAL_CLOCK_CG_TRNG = 16 + 64, /* bit 16, */
1165  HAL_CLOCK_CG_PWM2 = 19 + 64, /* bit 19, */
1166  HAL_CLOCK_CG_PWM3 = 20 + 64, /* bit 20, */
1167  HAL_CLOCK_CG_PWM4 = 21 + 64, /* bit 21, */
1168  HAL_CLOCK_CG_PWM5 = 22 + 64, /* bit 22, PDN_COND2_TO */
1169 
1170  /* NR_CM_PDN_COND0 = 10 */
1171  HAL_CLOCK_CG_LCD = 0 + 96, /* bit 0, CM_PDN_COND0_FROM */
1172  HAL_CLOCK_CG_RESEIZER = 1 + 96, /* bit 1, */
1173  HAL_CLOCK_CG_ROTDMA = 2 + 96, /* bit 2, */
1174  HAL_CLOCK_CG_CAM_BCLK = 3 + 96, /* bit 3, */
1175  HAL_CLOCK_CG_PAD2CAM = 4 + 96, /* bit 4, */
1176  HAL_CLOCK_CG_G2D = 5 + 96, /* bit 5, */
1177  HAL_CLOCK_CG_MM_COLOR = 6 + 96, /* bit 6, */
1178  HAL_CLOCK_CG_AAL = 7 + 96, /* bit 7, */
1179  HAL_CLOCK_CG_DSI0 = 8 + 96, /* bit 8, */
1180  HAL_CLOCK_CG_LCD_APB = 9 + 96, /* bit 9, CM_PDN_COND0_TO */
1181 
1182  /* NR_ACFG_CLK_RG = 5 */
1183  HAL_CLOCK_CG_AUXADC = 2 + 128, /* bit 2, ACFG_CLK_RG_FROM */
1184  HAL_CLOCK_CG_GPDAC = 6 + 128, /* bit 6, */
1185  HAL_CLOCK_CG_SENSOR_DMA = 8 + 128, /* bit 8, */
1186  HAL_CLOCK_CG_I2C1 = 9 + 128, /* bit 9, */
1187  HAL_CLOCK_CG_I2C0 = 10 + 128, /* bit 10, ACFG_CLK_RG_TO */
1188 } hal_clock_cg_id;
1189 
1198 #endif
1199 
1200 #ifdef __cplusplus
1201 }
1202 #endif
1203 
1204 #endif /* __HAL_PLATFORM_H__ */
1205 
hal_spi_master_clock_polarity_t
SPI master clock polarity definition.
Definition: hal_platform.h:597
The total number of PWM channels (invalid PWM channel).
Definition: hal_platform.h:902
Reserved.
Definition: hal_platform.h:141
Clock polarity is 0.
Definition: hal_platform.h:598
Modem interface.
Definition: hal_platform.h:144
16000Hz
Definition: hal_platform.h:522
hal_clock_cg_id
Use hal_clock_cg_id in Clock API.
Definition: hal_platform.h:1121
EINT number 25: BTSYS BTIF.
Definition: hal_platform.h:772
hal_sd_port_t
This enum defines the SD/eMMC port.
Definition: hal_platform.h:1007
hal_i2s_sample_rate_t
I2S sampling rates.
Definition: hal_platform.h:518
Both send and receive data transfer is the LSB first.
Definition: hal_platform.h:649
hal_spi_slave_command_type_t
This enum defines the SPI slave commands.
Definition: hal_platform.h:680
PWM channel 4.
Definition: hal_platform.h:900
hal_gpt_clock_source_t
GPT clock source.
Definition: hal_platform.h:816
GDMA channel 0.
Definition: hal_platform.h:867
GPIO pin5.
Definition: hal_platform.h:345
GPIO pin33.
Definition: hal_platform.h:373
GPIO pin1.
Definition: hal_platform.h:341
32000Hz
Definition: hal_platform.h:525
Set the GPT clock source to 32kHz, 1 tick = 1/32768 seconds.
Definition: hal_platform.h:817
TX data underflow.
Definition: hal_platform.h:511
hal_sleep_mode_t
Sleep modes.
Definition: hal_platform.h:130
Reset Generation Unit.
Definition: hal_platform.h:148
GPT port 1: User defined.
Definition: hal_platform.h:807
hal_spi_slave_clock_polarity_t
SPI slave clock polarity definition.
Definition: hal_platform.h:654
Multimedia display serial interface.
Definition: hal_platform.h:150
GPIO pin40.
Definition: hal_platform.h:380
GPIO pin24.
Definition: hal_platform.h:364
define GPIO output clock 4
Definition: hal_platform.h:420
GPT port 3: Used for software GPT.
Definition: hal_platform.h:809
GPT port 0: Used for OSTD timer.
Definition: hal_platform.h:806
12000Hz
Definition: hal_platform.h:521
GPIO pin48.
Definition: hal_platform.h:388
hal_eint_number_t
EINT pins.
Definition: hal_platform.h:746
define GPIO output clock 3
Definition: hal_platform.h:419
define GPIO output clock mode of max number(invalid)
Definition: hal_platform.h:430
SDIO port 0.
Definition: hal_platform.h:1036
Read command is received.
Definition: hal_platform.h:671
ADC channel 8.
Definition: hal_platform.h:459
hal_pwm_source_clock_t
PWM clock source options.
Definition: hal_platform.h:907
External TDM mode (invalid).
Definition: hal_platform.h:500
hal_spi_slave_callback_event_t
This enum defines the SPI slave event when an interrupt occurs.
Definition: hal_platform.h:667
No sleep.
Definition: hal_platform.h:131
GPIO pin45.
Definition: hal_platform.h:385
Both send and receive data transfer LSB first.
Definition: hal_platform.h:612
GPIO pin39.
Definition: hal_platform.h:379
GPIO pin31.
Definition: hal_platform.h:371
GPIO pin28.
Definition: hal_platform.h:368
GPIO pin42.
Definition: hal_platform.h:382
The total number of GPIO pins (invalid GPIO pin number).
Definition: hal_platform.h:389
hal_spi_master_clock_phase_t
SPI master clock format definition.
Definition: hal_platform.h:604
The SPI slave device is connected to the SPI master's CS0 pin.
Definition: hal_platform.h:591
An error occurred during a read command.
Definition: hal_platform.h:674
UART port 0.
Definition: hal_platform.h:181
GPIO pin2.
Definition: hal_platform.h:342
hal_spi_master_slave_port_t
This enum defines the options to connect the SPI slave device to the SPI master's CS pins...
Definition: hal_platform.h:590
Keypad.
Definition: hal_platform.h:142
GPIO pin29.
Definition: hal_platform.h:369
To support range detection.
Definition: hal_platform.h:135
PWM channel 1.
Definition: hal_platform.h:897
SPI protocol slave.
Definition: hal_platform.h:147
define GPIO output clock mode as 26MHz
Definition: hal_platform.h:428
GPIO pin36.
Definition: hal_platform.h:376
Configure write command is received.
Definition: hal_platform.h:672
PWM clock source 13MHz.
Definition: hal_platform.h:908
SD/eMMC port 0.
Definition: hal_platform.h:1008
Write Data command.
Definition: hal_platform.h:683
Deep sleep state.
Definition: hal_platform.h:134
Clock polarity is 1.
Definition: hal_platform.h:656
hal_gdma_channel_t
gdma channel
Definition: hal_platform.h:866
EINT number 20: Keypad.
Definition: hal_platform.h:767
define GPIO output clock max number(invalid)
Definition: hal_platform.h:422
GPIO pin15.
Definition: hal_platform.h:355
POWER ON command.
Definition: hal_platform.h:686
44100Hz
Definition: hal_platform.h:526
GPIO pin27.
Definition: hal_platform.h:367
SDIO port 1.
Definition: hal_platform.h:1037
GPIO pin18.
Definition: hal_platform.h:358
hal_i2s_event_t
I2S event.
Definition: hal_platform.h:507
Configure Read command.
Definition: hal_platform.h:688
Clock format is 0.
Definition: hal_platform.h:605
The total number of GDMA channels (invalid GDMA channel).
Definition: hal_platform.h:868
Both send and receive data transfer MSB first.
Definition: hal_platform.h:613
GPIO pin20.
Definition: hal_platform.h:360
SPI slave port 0.
Definition: hal_platform.h:643
PWM channel 0.
Definition: hal_platform.h:896
EINT number 31: GPCOUNTER.
Definition: hal_platform.h:778
A timeout is detected between configure read command and read command or configure write command and ...
Definition: hal_platform.h:676
GPIO pin21.
Definition: hal_platform.h:361
hal_spi_slave_clock_phase_t
SPI slave clock format definition.
Definition: hal_platform.h:661
Sleep state.
Definition: hal_platform.h:133
I2C master 2.
Definition: hal_platform.h:305
UART port 3.
Definition: hal_platform.h:184
Multimedia display bus interface.
Definition: hal_platform.h:149
The total number of SPI master ports (invalid SPI master port).
Definition: hal_platform.h:585
ADC channel 12.
Definition: hal_platform.h:461
GPIO pin13.
Definition: hal_platform.h:353
hal_spi_master_bit_order_t
SPI master transaction bit order definition.
Definition: hal_platform.h:611
PWM clock srouce 32kHz.
Definition: hal_platform.h:909
hal_gpio_clock_t
This enum defines output clock number of GPIO.
Definition: hal_platform.h:415
Configure read command is received.
Definition: hal_platform.h:670
An error occurred during a write command.
Definition: hal_platform.h:675
GPIO pin16.
Definition: hal_platform.h:356
define GPIO output clock 2
Definition: hal_platform.h:418
11025Hz
Definition: hal_platform.h:520
define GPIO output clock 0
Definition: hal_platform.h:416
GPIO pin35.
Definition: hal_platform.h:375
ADC channel 13.
Definition: hal_platform.h:462
SPI master port 1.
Definition: hal_platform.h:582
EINT number 23: UART2 RX.
Definition: hal_platform.h:770
Read Data command.
Definition: hal_platform.h:684
GPIO pin12.
Definition: hal_platform.h:352
ADC channel 11.
Definition: hal_platform.h:460
Idle state.
Definition: hal_platform.h:132
hal_adc_channel_t
ADC channel.
Definition: hal_platform.h:457
hal_gpio_pin_t
This enum defines the GPIO port.
Definition: hal_platform.h:339
UART port 2.
Definition: hal_platform.h:183
GPIO pin17.
Definition: hal_platform.h:357
GPT port 4: Use to set a microsecond delay and get microsecond free count.
Definition: hal_platform.h:810
EINT number 24: BTSYS.
Definition: hal_platform.h:771
GPIO pin10.
Definition: hal_platform.h:350
Notify user the RX data is ready.
Definition: hal_platform.h:513
GPIO pin11.
Definition: hal_platform.h:351
hal_spi_slave_port_t
This enum defines the SPI slave port.
Definition: hal_platform.h:642
I2C master 0.
Definition: hal_platform.h:303
The total number of SPI slave ports (invalid SPI slave port number).
Definition: hal_platform.h:644
The total number of SPI master CS pins (invalid SPI master CS pin).
Definition: hal_platform.h:593
GPIO pin23.
Definition: hal_platform.h:363
Reserved.
Definition: hal_platform.h:145
SPI master port 0.
Definition: hal_platform.h:581
24000Hz
Definition: hal_platform.h:524
GPIO pin34.
Definition: hal_platform.h:374
PWM channel 3.
Definition: hal_platform.h:899
GPIO pin44.
Definition: hal_platform.h:384
Clock polarity is 1.
Definition: hal_platform.h:599
External interrupt.
Definition: hal_platform.h:140
GPIO pin37.
Definition: hal_platform.h:377
Clock format is 0.
Definition: hal_platform.h:662
GPIO pin32.
Definition: hal_platform.h:372
GPIO pin43.
Definition: hal_platform.h:383
SD/eMMC IP.
Definition: hal_platform.h:143
ADC channel 7.
Definition: hal_platform.h:458
GPIO pin4.
Definition: hal_platform.h:344
GPIO pin19.
Definition: hal_platform.h:359
The total number of EINT channels (invalid EINT channel).
Definition: hal_platform.h:779
hal_gpio_clock_mode_t
This enum defines output clock mode of GPIO.
Definition: hal_platform.h:427
Set the GPT clock source to 1MHz, 1 tick = 1 microsecond.
Definition: hal_platform.h:818
GPT port 5: Use to set a millisecond delay and get 1/32Khz free count.
Definition: hal_platform.h:811
The total number of ADC channels (invalid ADC channel).
Definition: hal_platform.h:465
GPIO pin22.
Definition: hal_platform.h:362
SPI master port 3.
Definition: hal_platform.h:584
GPIO pin26.
Definition: hal_platform.h:366
EINT number 26: UART3 RX.
Definition: hal_platform.h:773
EINT number 21: UART0 RX.
Definition: hal_platform.h:768
GPIO pin7.
Definition: hal_platform.h:347
The total number of GPT ports (invalid GPT port).
Definition: hal_platform.h:812
Power on command is received.
Definition: hal_platform.h:668
Clock polarity is 0.
Definition: hal_platform.h:655
8000Hz
Definition: hal_platform.h:519
Write Status command.
Definition: hal_platform.h:681
GPIO pin41.
Definition: hal_platform.h:381
I2C master 1.
Definition: hal_platform.h:304
hal_spi_master_port_t
This enum defines the SPI master port.
Definition: hal_platform.h:580
GPIO pin30.
Definition: hal_platform.h:370
GPIO pin6.
Definition: hal_platform.h:346
hal_sleep_manager_wakeup_source_t
sleep_manager wake up source
Definition: hal_platform.h:138
ADC channel 15.
Definition: hal_platform.h:464
External mode.
Definition: hal_platform.h:499
Power off command is received.
Definition: hal_platform.h:669
GPIO pin8.
Definition: hal_platform.h:348
No error occurred during the function call.
Definition: hal_platform.h:509
General purpose timer.
Definition: hal_platform.h:139
POWER OFF command.
Definition: hal_platform.h:685
An error occurred during the function call.
Definition: hal_platform.h:508
PWM channel 2.
Definition: hal_platform.h:898
Write command is received.
Definition: hal_platform.h:673
hal_sdio_port_t
This enum defines the SDIO port.
Definition: hal_platform.h:1035
GPIO pin38.
Definition: hal_platform.h:378
GPIO pin25.
Definition: hal_platform.h:365
define GPIO output clock mode as 32KHz
Definition: hal_platform.h:429
GPIO pin3.
Definition: hal_platform.h:343
hal_i2c_port_t
This enum defines the I2C port.
Definition: hal_platform.h:302
RX data overflow.
Definition: hal_platform.h:510
48000Hz
Definition: hal_platform.h:527
PWM channel 5.
Definition: hal_platform.h:901
SPI master port 2.
Definition: hal_platform.h:583
hal_spi_slave_bit_order_t
SPI slave transaction bit order definition.
Definition: hal_platform.h:648
Configure Write command.
Definition: hal_platform.h:687
EINT number 29: RTC.
Definition: hal_platform.h:776
Internal mode (invalid).
Definition: hal_platform.h:501
Internal loopback mode.
Definition: hal_platform.h:502
define GPIO output clock 1
Definition: hal_platform.h:417
EINT number 27: USB.
Definition: hal_platform.h:774
Read Status command.
Definition: hal_platform.h:682
hal_gpt_port_t
GPT port.
Definition: hal_platform.h:805
ADC channel 14.
Definition: hal_platform.h:463
hal_uart_port_t
UART port index There are total of four UART ports.
Definition: hal_platform.h:180
UART port 1.
Definition: hal_platform.h:182
GPIO pin14.
Definition: hal_platform.h:354
EINT number 22: UART1 RX.
Definition: hal_platform.h:769
SD/eMMC port 1.
Definition: hal_platform.h:1009
The SPI slave device is connected to the SPI master's CS1 pin.
Definition: hal_platform.h:592
Clock format is 1.
Definition: hal_platform.h:606
Clock format is 1.
Definition: hal_platform.h:663
EINT number 28: ACCDET.
Definition: hal_platform.h:775
GPIO pin47.
Definition: hal_platform.h:387
The total number of I2C masters (invalid I2C master number).
Definition: hal_platform.h:306
GPIO pin9.
Definition: hal_platform.h:349
hal_pwm_channel_t
The PWM channels.
Definition: hal_platform.h:895
Request for user-defined data.
Definition: hal_platform.h:512
EINT number 30: PMIC.
Definition: hal_platform.h:777
22050Hz
Definition: hal_platform.h:523
GPT port 2: User defined.
Definition: hal_platform.h:808
hal_i2s_initial_type_t
This enum defines initial type of the I2S.
Definition: hal_platform.h:498
GPIO pin0.
Definition: hal_platform.h:340
define GPIO output clock 5
Definition: hal_platform.h:421
SD/eMMC's second IP.
Definition: hal_platform.h:146
The total number of UART ports (invalid UART port number).
Definition: hal_platform.h:185
GPIO pin46.
Definition: hal_platform.h:386
Both send and receive data transfer is the MSB first.
Definition: hal_platform.h:650